Senior EDA Software Engineer
Build the core engines of Stalnix EDA, our RTL-to-GDSII chip design platform: simulation, synthesis, static timing, place and route, and sign-off.
Job description
What you will do
- Design and build core engines in one or more areas: HDL simulation (Verilog, SystemVerilog, VHDL), logic synthesis, static timing analysis, placement and routing, or sign-off checks
- Write fast, memory-efficient C++ for large designs, with Python for flows and tests
- Build HDL parsers, elaboration and netlist data structures
- Verify the engines against open-source RTL and reference designs, and compare quality of results with industry tools
- Work with our AI team on the EDA co-pilot and with our GPU team, who design with the tools every day
What you bring
- 6+ years developing EDA software: simulators, synthesis, STA, place and route or verification tools
- Strong modern C++ (17/20), data structures and algorithms: graphs, SAT/BDD, optimisation
- Solid digital design knowledge: HDL semantics, timing, standard cells
- Debugging and profiling large codebases on Linux, with Git
Good to have
- Contributions to Yosys, Verilator, OpenROAD, OpenSTA or Icarus Verilog
- Formal and equivalence checking
- Liberty, LEF/DEF, SDC and GDSII formats
- Parallel and multi-threaded computing